1 of 7 071700 features 5v power-on reset 3.3v power-on reset internal power is drawn from higher of either the 5v in input or the 3.3v in input excellent for systems designed to operate with dual power supplies asserts resets during power transients pushbutton reset input for system override maintains reset for 350 ms after v cc returns to an in-tolerance condition reduces need for discrete components precision temperature-compensated voltage reference and voltage sensor 8-pin dip, 8-pin soic, and 8-pin -sop available cmos output for low current operation on the ds1834 and ds1834d operating temperature of -40 c to +85 c pin assignment pin description 5v in - 5v power supply input 5v rst (*rst) - 5v reset output 5v tol - selects 5v input tolerance gnd - ground pbrst - pushbutton reset 3.3v tol - selects 3.3v input tolerance 3.3v rst (*rst) - 3.3v reset output 3.3v in - 3.3v power supply input *ds1834d active high reset description the ds1834 dual econoresets monitors three vital system conditions: 5-volt supply, 3.3-volt supply, and an external override. first a precision temperature reference and comparator circuit monitor the status of the 5-volt supply and the 3.3-volt supply. when an out-of-tolerance condition is detected, an internal power-fail signal is generated which forces the reset of the affected supply to an active state. lastly, the ds1834 supports an external reset via an internally debounced pushbutton input. when the pushbutton is pulled low both resets will be asserted for approximately 350 ms after the pushbutton is released. ds1834/a/d dual econoreset with pushbutton www.dalsemi.com ds1834 8-pin soic (150-mil) 1 2 3 4 8 7 6 5 5v in 5v rst 5v tol gnd 3.3v in 3.3v rst 3.3v tol pbrst ds1834 8-pin 5v in 5v rst ( *rst ) 5v tol gnd 3.3v in 3.3v rst (*rst) 3.3v tol pbrst 1 2 3 4 8 7 6 5 ds1834 8-pin dip (300-mil) 5v in 5v rst 5v tol gnd 3.3v in 3.3v rst 3.3v tol pbrst 1 2 3 4 8 7 6 5
ds1834/a/d 2 of 7 operation power monitor the ds1834 provides the functions of detecting out-of-tolerance conditions on a 3.3-volt and 5-volt power supply and warning a processor-based system of impending power failure. when an input is detected as out of tolerance on either voltage input the rst for that supply will be forced active. when that input returns to a valid state the rst will remain active for about 350 ms and then return to an inactive state until the next input out-of-tolerance condition. on power-up both resets are kept active for approximately 350 ms after the power supply inputs have reached the selected tolerance. this allows the power supply and system power to stabilize before rst is released. all internal operating current for the ds1834 will be drawn from the input with the highest voltage level. the outputs will draw current only from the controlling input (5v in or 3.3v in). ds1834 block diagram figure 1 ds1834a block diagram output figure 2
ds1834/a/d 3 of 7 tolerance select the ds1834 provides two tol inputs for individual customization of the ds1834 to specific application requirements. if the tol for the 5-volt supply is tied to the 5-volt input a 10% tolerance is selected for the 5 volt supply. if the tol for the 3.3-volt supply is tied to the 3.3-volt input, a 20% tolerance is selected for the 3.3-volt supply. if tol inputs are tied to ground, the 5-volt input will be set at a 5% tolerance and the 3.3-volt input would be set to a 10% tolerance. pushbutton reset the ds1834 provides a pushbutton switch for manual reset control. when at least one of the ds1834 resets are not in a reset cycle, a pushbutton reset can be generated by pulling the pbrst pin low for at least 2 ms. when the pushbutton is held low, both resets are forced active and will remain active for about 350 ms after the pushbutton is released. the pushbutton input is pulled high through an internal 40 k ? = pull-up resistor and debounced via internal circuitry. see figure 3 for an application example and figure 4 for the timing diagram. pushbutton reset figure 3 timing diagram: pushbutton reset figure 4
ds1834/a/d 4 of 7 output valid conditions all versions of the ds1834 can maintain valid outputs as long as one input remains above 1.2 volts. however, the rst outputs on the ds1834 use a push-pull output structure which can maintain a valid output below 1.2 volts. to sink current below 1.2 volts a resistor can be connected from rst to gnd (see figure 5). this arrangement will maintain a valid value on the rst outputs even if all inputs are at 0 volts. during both power-up and power-down this arrangement will draw current when rst is in the high state. a value of about 100 k ? = should be adequate to maintain a valid condition. the ds1834a requires pull-up resistors on the outputs to maintain a valid output. the value of the resistors is not critical in most cases but must be set low enough to pull the output to a high state. a common value used is 10 k ? s (see figure 6 and figure 7). application diagram: rst valid to 0 volts v cc on the ds1834 figure 5 application diagram: ds1834a nmos outputs figure 6 note: if outputs are pulled-up to different voltages the outputs can not be connected to form a wired "and". application diagram: ds1834a wired "and" output figure 7
ds1834/a/d 5 of 7 timing diagram: power-down figure 8 timing diagram: power-up figure 9
ds1834/a/d 6 of 7 absolute maximum ratings* voltage on v in pin relative to ground -0.5v to +7.0v voltage on rst (5v) pin relative to ground -0.5v to +0.5v in + 0.5v (ds1834 & ds1834d) voltage on rst (3.3v) pin relative to ground -0.5v to +3.3v in + 0.5v (ds1834 & ds1834d) voltage on pbrst & rst (ds1834a) pin relative to ground -0.5 to the greater of 0.5v in + 0.5v or 3v in + 0.5v operating temperature -40 c to +85 c storage temperature -55 c to +125 c soldering temperature 260 c for 10 seconds * this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. recommended dc operating conditions (-40 c to +85 c) parameter symbol min typ max units notes 5v in (supply voltage) v in 1.2 5.5 v 1 3v in (supply voltage) v in 1.2 5.5 v 1 pbrst input high level v ih 2 v in(max) -0.4 v in(max) +0.3 v v 1 1, 3 pbrst input low level v il -0.3 0.5 v 1 dc electrical characteristics (-40 c to +85 c; v cc =1.2v to 5.5v) parameter symbol min typ max units notes output voltage v oh v in -0.1v v1 input leakage i il -1.0 +1.0 a4 output current @ 2.4v i oh 350 a5 output current @ 0.4v i ol +10 ma 5 operating current @ 5.5v in i cc 50 a6 operating current @ 3.6v in i cc 35 a7 5v in trip point (tol=gnd) v intp 4.50 4.63 4.75 v 1 5v in trip point (tol=5v in )v intp 4.25 4.38 4.49 v 1 3.3v in trip point (tol=gnd) v intp 2.80 2.88 2.97 v 1 3.3v in trip point (tol=3.3v in )v intp 2.47 2.55 2.64 v 1 output capacitance c out 10 pf
ds1834/a/d 7 of 7 ac electrical characteristics (-40 c to +85 c; v cc =1.2v to 5.5v) parameter symbol min typ max units notes pbrst = v il t pb 2ms pbrst stable low to reset active t pdly 2ms reset active time t rst 200 350 500 ms v cc detect to rst (or rst) t rpd 2 s8 v cc slew rate (v intp(max) to v intp(min) ) t f 300 s v cc slew rate (v intp(min) to v intp(max) ) t r 0ns v cc detect to rst (or rst) t rpu 200 350 500 ms 9 notes: 1. all voltages are referenced to ground. 2. measured with both 3.3v in and 5v in = 2.7v. 3. measured with both 3.3v in and 5v in = 2.7v. 4. pbrst is internally pulled up to v in(max) input with an internal impedance of approximately 40 k ? . 5. measured with either 3.3v in or 5v in = 2.7v (valid for ds1834 and ds1834d only). 6. measured with outputs open and both 3.3v in and 5v in = 5.5v. 7. measured with outputs open and both 3.3v in and 5v in = 3.6v. 8. noise immunity - pulses < 2 s @ v cctp minimum will not generate a reset. 9. t r =5 s. marking: ds1834 ds1834a ds1834d 8-pin dip ds1834 ds1834a ds1834d 8-pin soic ds1834 ds1834a ds1834d 8-pin -sop 834 834a 834d
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